Senior System Verilog Verification Engineer - Cambridge - Negotiable

I am currently recruiting for a senior system Verilog verification engineer for a client of mine that specialise in machine learning & AI inference solutions. You will architect their next generation of verification environment for their FPGA based AI Inferencing solutions.

Key responsibilities:

+ Designing System Verilog based verification environments to support a
range of IP products

+ Optimizing verification code to enable fast simulation support for software
integration

+ Communicating the verification environment design and supporting others
to use, add and extend testing during IP development

Key skills:

+Strong understanding of Verilog

+ Experience simulating and verifying large RTL designs

+Experience working in Linux based development environments

+ Knowledge of C/ C++ or other imperative coding language

They are negotiable on salary depending on experience and can offer great company benefits. If you feel like you have the right skills and experience for this role, then please apply with an updated CV