Developing cutting edge RTL for high-performance low latency applications

This is a senior engineering role based in Cambridge, UK, working as part of an international team of software and hardware design engineers. The company's focus is in high-performance, low latency technologies, with an interest in parallel processing, algorithmic efficiency, data throughput, and network performance.

You'd work alongside senior software engineers in Cambridge, and fellow hardware engineers in Europe. As the team grows, more peers in hardware would join you in the UK office.

Your CV will show your:

* Good degree in electronics or another technical subject from a top university

* Extensive experience developing complex and well-structured RTL in SystemVerilog, Verilog or VHDL, with particular attention to design approach and performance constraints

And as a skilled FPGA Design Engineer you will also have, as your CV demonstrates:

* A strong understanding of digital logic, synchronous design, and hardware architecture

* Good experience with Xilinx and/or Intel (Altera) FPGAs and relevant tools

* Digital design and verification flow experience, from micro-architectures' definition through to RTL development, creation of test benches, simulation, synthesis, place and route, timing analysis and emulation.

* Excellent analytical thinking, problem-solving and troubleshooting skills with an aptitude to resolve complex issues.

Additional experience with Python scripting, multi clock, cross clock domain and/or asynchronous execution and/or PHY networking is beneficial. This is a Cambridge, UK-based position offering hybrid working options, and requiring full existing work permission without sponsorship.

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Please apply (quoting ref: CV27407) only if you are eligible to live and work in the UK. By submitting your details you certify that the information you provide is accurate