Senior Staff CPU Verification Engineer
The location can be either Austin or Santa Clara
Design Verification Engineers at various levels for a family of high-end 64 bit super scalar micro-processors.
Responsibilities (depends on the detailed assignment, the candidate may actually carry out a portion of the responsibilities below):
- Design the verification architecture of a high-end 64 bit super scalar micro-processor;
- Participate in the definition of full-chip and block level DV methodology;
- Draft and review the test scheme and test plan;
- Design and maintain test benches;
- Work with a team of DV engineers in development of all test cases, and test bench architecture;
- Coordinate the DV effort across multiple sites;
- Oversee the design/DV environment issues.
- 4-10 years of design verification experience in micro-processor design, with programming ability in C, C++, System C and System Verilog.
- Knowledge in CPU verification.
- Must be a highly organized, detail-oriented self-starter, who works well independently, as well as in a team environment.
- Master s degree preferred.
- Good verbal and written communication skills.
- provided by Dice